This invention relates to information movement within a data processing system generally between a memory unit of the data processing system and a peripheral, and more specifically, relates to a microprocessor based input/output (I/O) controller.
Microprocessor based systems, especially those used as intelligent peripheral controllers, are often faced with a time critical data movement problem. In its simplest form, this problem is one of moving data from a buffer in a peripheral controller device to an ordered array of sequential locations in memory (RAM).
In present systems, data movement is handled by a method normally referred to as programmed I/O, wherein the microprocessor determines the peripheral has a word of data to be transferred via an interrupt or a read of some status. The microprocessor reads the data and stores it in a memory location of RAM. This method is relatively slow and an over-run may occur if the peripheral receives data faster than the microprocessor can remove it. The reverse process, memory to peripheral transfers, is handled similarly. An under-run condition occurs when the microprocessor cannot transfer data to the peripheral fast enough.
A second method of data transfer between memory and a peripheral involves direct memory access (DMA) techniques. In this method the microprocessor instructs a DMA controller to transfer a given block of data to or from a peripheral and the DMA controller transfers the data without further microprocessor intervention. The microprocessor can continue in its normal program execution. High data transfer rates can be attained with DMA techniques.
The present invention allows data transfer rates faster than that attainable with programmed I/O without the expense of a DMA controller. Blocks of data are transferred between the peripheral (an interface to a local area network (LAN) in the preferred embodiment) and memory. The microprocessor is fully involved with the block transfer while it is in progress, i.e., the microprocessor is being single-stepped (made to execute a single instruction on demand) and its address lines are used to point to the memory locations to be affected.